Monday, September 21, 2009



1> Basic structure of computer
Introduction of computer system and its sub modules,

  • Basic organization of computer and block level description of the
    functional units.
  • Von newmann model,
  • Introduction to buses andconnecting I/O devices to CPU and memory,
  • Asynchronous and synchronous bus, PCI, SCSI.
  • 2 >Arithmetic and Logic Unit.
    Arithmetic and logical unit hardware implementation,
  • Booth’s Recoding,
  • Booth’s algorithm for signed multiplication ,
  • Restoring division and non restoring division algorithm,
  • IEEE floating point number representation and operations.
  • 3 >Central processing unit.
    CPU architecture, Register organization ,
  • Instruction formats and addressing modes (Intel processor).,
  • Basic instruction cycle,Instruction interpretation and sequencing,
  • Control Unit operation,Hardwired control unit design methods and design examples,
    Multiplier control unit, Micro programmed control unit, basic concepts, Microinstruction sequencing and execution , Micro operations, concepts of nanoprogramming,
  • Introduction to RISC andCISC architectures, design issues and examples of RISC processors.

    4 >Memory Organization.
  • Characteristics of memory system and hierarchy, concepts of
    semiconductor memories, main memory, ROM, EPROM, RAM,
    SRAM, DRAM, SDRAM, RDRAM, , Flash memory, Stack
    Organization.
  • High speed memories: Cache memory organization
    and mapping, replacement algorithms , cache coherence,
  • Interleaved and associative memories ,
  • Virtual memory, main memory allocation , segmentation paging,
  • Secondary storage, optical memory, CDROM, DVD
  • RAID,.
    5 >I/O Organization.
  • Input/Output systems, Programmed I/O, Interrupt driven I/O,
  • I/O channels, DMA, Peripheral Devices, U.S.B.
    6 >Multiprocessor Configurations.
  • Flynn’s classifications, parallel processing concepts,
  • Introduction to pipeline processing and pipeline hazards, design issues of pipeline
    architecture, Instruction pipeline, Instruction level parallelism and
    advanced issues.
    7 >SPARC
    Static and Dynamic data flow design, Fault tolerant computers,
    Interprocessor communication and synchronization, cache
    coherence, shared memory
    multiprocessor.
    8 >Systolic Architectures
    Systolic arrays and their applications, wave front arrays
    .


TERM WORK:
Based on above syllabus at least 10 experiments and one written test of 10 marks
to be conducted.


Text Books:
1. Miles Murdocca, “Computer Architecture and Organization”, Wiley India
2. William Stallings, “Computer Organization and Architecture: Designing and
performance”: Prentice-Hall India
3. Carl Hamacher, Zvonko Vranesic and Safwat Zaky “Computer Organization”,
McGraw Hill
Reference Books:
1. John L. Hennessy and David Patterson,” Computer Architecture A Quantitative
Approach”, Morgan Kaufman
2. Andrew S. Tanenbaum,” Structured Computer Organization”, Prentice-Hall India

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