Structure of IAS

Structure of IAS

The control unit fetches 2 instruction at a time but execute only 1 instruction at a time.

Memory Buffer Register (MBR): It stores word to be written in memory or receive a word from memory.
Memory Address Register (MAR): It specifies address of memory location for data transfer
Instruction Register (IR) : It stores 8 bit opcode of the instruction getting currently executed
Instruction Buffer Register(IBR) : It holds temporarily the right instruction fetch from an instruction word in memory
Program Counter (PC): It contain address of the next instruction pair to be fetched from memory.
Accumulator(AC) & Multiplier Quotient(MQ): They hold operands and result of ALU Operations. e.g Multiplying two 40 bit numbers give 80 bit result. Higher 40 bit are stored in AC and lower 40 bit are stored in MQ.